1 application note 1593 author: jeff lies add a loss of signal (los) indicator to your rs-485 or rs-422 transceiver introduction a desirable feature on any netw ork may be a loss of signal (los) indicator. such an indicato r alerts a monitoring controller that a potentially serious network error has occurred, thereby allowing for notification and/ or intervention. in an rs-485/ rs-422 network, a los may occur if a connector disconnects from a board, if a cable fails, or if the network driver fails or loses power. when this occurs, bus activity ceases - as shown in figure 1 - and an los detector would assert its output. this application note discusses th e rs-485/rs-422 receiver (rx) operation, explains how the rx interprets the differential bus voltages, and introduces a meth od for generating the desired los indicator. rs-485 receiver (rx) basics the rs-485/rs-422 rx is a differ ential circuit (comparator) that compares voltages at the noninverting and inverting inputs (a and b), and outputs a corresponding logic level. per the standards, if a-b (i.e., the differential input voltage) is greater than +200mv, then the rx outputs a logic high; if a-b < -200mv, then the rx outputs a logic low. any differential voltage between -200mv and +2 00mv is undefined, and the rx might output a logic high, a logic low, or may even oscillate. rx failsafe in rs-485/rs-422 terminology, ?failsafe? is used to indicate rx functionality that drives the rx output to a known state when common bus faults occur. the logic high state typically represents the idle (no transmi ssion in progress) state, so driving the rx output to a logic high under fault conditions is the usual failsafe implementation. without the failsafe function, an rx output?s inadvertant logic low, or oscillation, might be interpreted as a messag e start bit. this could cause a processor to waste valuable time attempting to service phantom messages. the most common form of failsafe is failsafe open, with ?open? referring to the condit ion where the rx inputs are floating. this can occur when a network bus is cut, or if the bus connector separates from the ne tworked device containing the rx. most rs-485 rx available to day incorporate this function, and it is typically accomplished via an internal pull-up resistor on the noninverting (a) input. the pull-up is sized to ensure that if the rx inputs float, then the rx input circuitry creates enough of a positive offset so that the rx comparator interprets the input condition as a logic high. the ?full-failsafe? rs-485 receiver an improved differential rx includes all the features mentioned previously, plus the addition of circuitry to ensure that the rx is failsafe if the differential input voltage (v id ) is 0v (failsafe ?shorted?). this condition may occur due to a cable error (e.g., crimped), a connector error (shorted pins), or in normally operating networks where multiple drivers operate on a terminated bus (multi-point network). multi-point operation requires that all driver s be tri-statable, and there are periods of time when all drivers are simultaneously tri-stated. when this occurs, the differen tial terminatio n resistor(s) causes the bus voltage to collapse to the v id =0v condition. as mentioned before, v id =0v is an undefined rs-485 level, so an rx with only failsafe open functionality may generate erroneous start bits. the full-failsafe rx solves this problem by ensuring that the v id =0v condition is recognized as a logic high input, so the rx output remains in the idle state. full-failsafe functionality is accomplished by designing the rx so that the minimum input high level is slightly negative (-10mv to -25mv), rather than the +200mv used for standard rs-485 and rs-422 rx. note that this new threshold definition remains rs-422 and rs-485 compliant. figure 1. typical los operation time (1s / div) voltage (v) -5 -3 -1 1 3 5 0 v bus los caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2011. all rights reserved. intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. february 1, 2011 an1593.0
application note 1593 2 an1593.0 february 1, 2011 using full-failsafe receivers for los detection this full-failsafe feature can be exploited to detect the los bus condition. the advantage of using full failsafe receivers for los detection is that the v id =0v condition is now a valid input condition. if the network is set up so that a los causes the v id =0v condition, then the full-fails afe function can be utilized to detect the los. adding an additional full-failsafe rx allows los detection figure 2 illustrates circuitry that can implement an los detection function. the transceiver block can be any rs-422 or rs-485 ic with a full-failsafe rx (see table 1 for a list of intersil full-failsafe rx devices), and at least one termination resistor (r t ) is required to collapse the bus voltage when the bus is not actively driven. adding a second full-failsafe rx - with its inputs connected opposite to those of the primary rx - enables the los circuit to distinguish between the v id =0v bus state and the normal data = 1 bus state. when the bus is actively driven, rxd and rxd will be in opposite states (see figure 3). the only time that rxd and rxd are in the same state is when the bus voltage is 0v, because both rx interpret this as a logic high input. anding the two rx outputs yields an active high los signal (see figure 4). propagation delay differences (skews) between the transceiver rx and the secondary rx may cause glitches on the los signal. adding a low pass filter (r f and c f in figure 2) filters out these glitches. a good choice for the secondary rx is the isl3280e. it is a single rx in a micro package (5 ld sot-23), has the required full-failsafe function, operates up to 20mbps, and features iec61000-4-2 esd levels. additionally, the 3v-5v supply range, and the -40c to 125c operating temperature range allow for the isl3280es use in most rs- 485 and rs-422 applications. los detect may not work for all rx even if present at each full-failsafe rx node, the los detect circuit may not properly indicate all the possible los conditions. as previously mentioned, a termination resistor is required to force the v id =0v condition that indicates a los. unfortunately, the rs-422 standard allows only one termination re sistor on the bus, and the rs-485 standard allows only two. thus, only one or two of the los detectors can have the termination resistors. this is fine for the case where a multi- drop (only one driver on network with multiple receivers) network loses power to the driver, as the one termination resistor forces the v id =0v on the whole bus, and thus on each rx input. but if an rx without the termination resistor becomes disconnect ed from the bus, its v id may not be 0v, so the los circuit may not indicate the los condition. a possible solution is to include a larger value (e.g., 1k ? ) resistor across the inputs of the all rx that don?t have termination resistors. whether or not this is acceptable depends on the transceiver family used, the cr iticality of the termination resistance value (slow, slew rate limited transceivers aren?t as termination sensitive), and the number of nodes on the network. multi-point systems offer another challenge. as mentioned previously, there are multiple drivers on the bus, so there are periods of inactivity when one driver disables before another enables. if the idle period is long enough, the bus voltage might collapse to 0v, causing the los to momentarily activate. if this is a problem, then the user migh t have to implement a timing circuit to ensure that the los sign al has been active long enough to indicate a real los condition. d r r t ro d i rxd a/y b/z a b los ro r rxd figure 2. los detection circuit isl3280e r f c f + - v bus figure 3. rx output voltages relative to the bus voltage time (1s/div) voltage (v) 0 1 2 3 4 5 -4 -2 0 2 4 v bus rxd rxd figure 4. and gate output and filtered los indicator signal time (1s/div) voltage (v) 0 1 2 3 4 5 0 1 2 3 4 5 los and rxd rxd
application note 1593 3 intersil corporation reserves the right to make changes in circuit design, software and/or specifications at any time without n otice. accordingly, the reader is cautioned to verify that the application note or technical brief is current before proceeding. for information regarding intersil corporation and its products, see www.intersil.com an1593.0 february 1, 2011 intersil full-failsafe transceiver families intersil offers a wide range of full-failsafe rs-485/rs-422 transceiver families, and receiver only ics, as shown in table 1. most of the transceiver families include half and full duplex configurations, and a variety of data rates including slew rate limited versions for low data rate applications. conclusion a loss-of-signal (los) indicator may be useful for communication systems, but a standard rs-485 transceiver is ill suited to detect the los conditio n. if the rs-485 network utilizes transceivers with full-failsafe rece ivers, then additional circuitry can be added to implement the los detector. table 1. intersil rs-422/rs-485 full-failsafe receiver families part number type v cc (v) esd level isl83080e-88e transceivers 5 15kv hbm isl83070e-78e transceivers 3.3 15kv hbm isl3150e-59e transceivers 5 15kv iec isl3170e-79e transceivers 3.3 15kv iec isl32470e-78e isl32490e-98e 60v fault protected transceivers 5 16.5kv hbm ISL3280E-84E receiver only 3.3, 5 16.5kv iec isl32173e-77e isl32273e-77e quad receivers 3.3, 5 16.5kv iec
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